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@ -1122,13 +1122,36 @@ void dequantize_row_q4_1(const void * restrict x, float * restrict y, int k) {
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#define GGML_F16_EPR 8
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#define GGML_F16_EPR 8
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// F16 arithmetic is not supported by AVX, so we use F32 instead
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// F16 arithmetic is not supported by AVX, so we use F32 instead
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// we take advantage of the _mm256_cvt intrinsics to convert F16 <-> F32
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#define GGML_F32Cx8 __m256
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#define GGML_F32Cx8 __m256
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#define GGML_F32Cx8_ZERO _mm256_setzero_ps()
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#define GGML_F32Cx8_ZERO _mm256_setzero_ps()
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#define GGML_F32Cx8_SET1(x) _mm256_set1_ps(x)
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#define GGML_F32Cx8_SET1(x) _mm256_set1_ps(x)
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#if defined(__F16C__)
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// the _mm256_cvt intrinsics require F16C
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#define GGML_F32Cx8_LOAD(x) _mm256_cvtph_ps(_mm_loadu_si128((__m128i *)(x)))
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#define GGML_F32Cx8_LOAD(x) _mm256_cvtph_ps(_mm_loadu_si128((__m128i *)(x)))
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#define GGML_F32Cx8_STORE(x, y) _mm_storeu_si128((__m128i *)(x), _mm256_cvtps_ph(y, 0))
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#define GGML_F32Cx8_STORE(x, y) _mm_storeu_si128((__m128i *)(x), _mm256_cvtps_ph(y, 0))
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#else
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static inline __m256 __avx_f32cx8_load(ggml_fp16_t *x) {
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float tmp[8];
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for (int i = 0; i < 8; i++)
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tmp[i] = GGML_FP16_TO_FP32(x[i]);
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return _mm256_loadu_ps(tmp);
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}
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static inline void __avx_f32cx8_store(ggml_fp16_t *x, __m256 y) {
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float arr[8];
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_mm256_storeu_ps(arr, y);
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for (int i = 0; i < 8; i++)
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x[i] = GGML_FP16_TO_FP32(arr[i]);
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}
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#define GGML_F32Cx8_LOAD(x) __avx_f32cx8_load(x)
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#define GGML_F32Cx8_STORE(x, y) __avx_f32cx8_store(x, y)
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#endif
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#define GGML_F32Cx8_FMA GGML_F32x8_FMA
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#define GGML_F32Cx8_FMA GGML_F32x8_FMA
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#define GGML_F32Cx8_ADD _mm256_add_ps
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#define GGML_F32Cx8_ADD _mm256_add_ps
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#define GGML_F32Cx8_MUL _mm256_mul_ps
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#define GGML_F32Cx8_MUL _mm256_mul_ps
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